Professional

(under construction…)

Education

Employment History

  • Jan. 1989 to present. Principal Engineer, Digital Equipment Corporation, Western Research Laboratory.
    • Participated in the design of two ECL microprocessors and CAD tools for the design.
    • Now working on programs to edit executable files.
  • Jan. 1988 to Dec. 1989. Assistant Professor of Computer Science, University of Wisconsin at Madison (joint appointment with Department of Electrical and Computer Engineering.)
    • Teaching and research.
  • 1982 to 1987. Research Assistant. University of California at Berkeley.
    • VLSI layout systems, module generators.
  • 1982?. Consultant. Daisy Corporation.
    • Evaluated VLSI layout systems.
  • 1981 to 1982. Teaching Assistant. University of California at Berkeley.
    • Assisted in two courses: VLSI Design & Implementation (graduate level), Computer Implementation (junior level).
  • Summer 1982?. Student intern. Xerox PARC
    • VLSI module generation tools.
  • Various summers. Student intern. Tektronix, Inc.
    • Worked on the DAS 9100 logic analyzer.
    • For details see: Logic Analyzer Delivers Test Patterns, Too. Electronics Magazine, September 8, 1981, pp. 113-119.

Publications

  • Robert N. Mayo, Reprint of the Factoid Web Page, WRL Technical Note TN-60, July, 2001.
  • Jeffery C. Mogul, Joel F. Bartlett, Robert N. Mayo, Amitabh Srivastava, Performance Implications of Multiple Pointer Sizes Winter Usenix Conference, 1995. (Also WRL Technical Report XXX)
  • Robert N. Mayo, Herve Touati, Boolean Matching for Full-Custom ECL Gates, Proceedings of the IEEE International Conference on Computer-Aided Design, November 1993.
  • Norman P. Jouppi, et al. A 300-Mhz 115-W 32-b Bipolar ECL Microprocessor IEEE Journal of Solid-State Circuits, November 1993. (Also WRL Technical Report XXX)
  • Robert N. Mayo. Mocha Chip: A System for the Graphical Design of VLSI Module Generators, Proceedings of the International Conference on Computer-Aided Design, 1986.
  • Robert N. Mayo, Michael H. Arnold, Walter S. Scott, Don Stark, Gordon T. Hamachi. 1990 DECWRL/Livermore Magic Release, WRL Research Report 90/7, 1990.
  • Robert N. Mayo. Combining Graphics and Procedures in a VLSI Layout Tool: The Tpack System. Computer Science Department, University of California at Berkeley, report UCB-CSD 84/166, January 1984.
  • John K. Ousterhout, Gordon T. Hamachi, Robert N. Mayo, Walter S. Scott, George S. Taylor. A Collection of Papers on Magic Computer Science Department, University of California at Berkeley, report UCB-CSD 83/154, January 1984.
  • Robert N. Mayo, John K. Ousterhout, Pictures with Parenthesis: Combining Graphics and Procedures in a VLSI Layout Tool. Proceedings of the 20th Design Automation Conference, 1983.
  • Paul M. Hansen, Mark A. Linton, Robert N. Mayo, Marguerite Murphy, and David A. Patterson, A Performance Evaluation of the Intel iAPX 432 Computer Architecture News, June 1982.